Accelerate Your FPGA Design Development with Our Spectrum Language Solution

For FPGA developers. . .

Who are dissatisfied: 

1. with existing RTL design using Verilog and VHDL synthesis subsets which are too low-level, slow and laborious to code in, use and verify;

2. with existing HLS approaches whose products only work for a very limited range of applications, are difficult to understand and use, only synthesize IP components and not complete systems, and are difficult to integrate with RT-Level code; and

3. with generated controllers for algorithms that are low performance or can’t capture complex handshaking requirements, limiting the use of HLS for a large-set of projects;

Our product: makes coding at the algorithmic level straight-forward and convenient providing seamless integration with lower-levels of abstraction straightforward and less error-prone than with existing HLS approaches; 

We provide: a new multi-abstraction-level, object-oriented language called Spectrum, which is straightforward to read and understand and enables a significantly faster code-compile-debug loop for more effective and efficient development, resulting in faster design to market;

Hardware designs: described in the Spectrum language are compiled into VHDL code followed by further compilation with RTL tools such as Altera's Quartus Prime and AMD's Vivado,

Unlike the alternatives from EDA companies which require the purchase of multiple, high-priced tools and products that are inadequate for the high-level design and verification of today’s 1M+ gate designs.